1. Field of the Invention
The present invention relates to processing systems or devices and, more particularly, to adjustment of power used during operation of those devices.
2. Discussion of the Related Art
Portable and autonomously powered electronic devices (e.g., computer systems, telephones, PDAs, etc.) are becoming more and more sophisticated, while at the same time, becoming smaller. These devices, whether powered by batteries, fuel cells, solar power, or some other power source, are capable of performing functions that have been traditionally relegated to large desktop and server computer systems.
While the technology for portable electronic devices has progressed rapidly, improvements in battery capacity and energy density have not been as rapid. As a result, a gap has developed between the processing capabilities of portable electronic devices and the battery life of those devices. This gap has constrained the “autonomy” of portable electronic devices, reducing the amount of time between battery recharge or replacement, and thus limiting the true portability of these devices. Often, designers of portable electronic devices must delicately balance battery parameters such as size, weight, and cost against the portability and operational characteristics of the device.
In an attempt to overcome these problems, computer electronics manufacturers have incorporated many features into their hardware and software designs to extend battery life. A feature that has been introduced is frequency and voltage adjustment for microprocessors. Various companies, such as Intel, IBM, Texas Instruments, Motorola, and Transmeta, have introduced microprocessors that include the run-time capability to increase or decrease the frequency and voltage at which the microprocessor core operates. Since power consumption is directly proportional to the clock frequency of the microprocessor and to the square of the corresponding applied voltage, reductions in both parameters can have a cubic effect on overall power consumption of the device. However, reducing clock frequency may also reduce instruction-processing performance.
The related art provides several practices of understanding performance appropriately and adjusting performance in attempt to overcome this problem. For example, when activity of a computer system is below a threshold for a certain period of time, hardware components of the computer system are shut off or deactivated to conserve power. By way of example, a display backlight may be turned off or the computer system itself may be disabled in response to a user not providing any input to the computer system for several minutes. Alternatively, the microprocessor core may be placed in a non-processing low-power state with the clock stopped. Examples of such approaches are disclosed in U.S. Pat. Nos. 5,386,577, 5,493,685, 5,983,357 and/or 5,991,883, the disclosures of which are incorporated herein by reference in their entireties.
Further, the clock frequency of a microprocessor may be reduced when activity of a computer system is below a threshold for a certain period of time, and subsequently increased in response to increased computer system activity. Examples of such approaches are disclosed in U.S. Pat. Nos. 5,369,771, 5,628,001, 5,752,011 and/or 5,983,357, the disclosures of which are incorporated herein by reference in their entireties.
In addition, the types of activities that a computer system performs may be monitored to determine whether clock frequency and voltage are to be reduced or increased. Examples of such approaches are disclosed in U.S. Pat. Nos. 5,504,908, 5,625,826, 5,892,959, 5,996,084 and/or 6,427,211, the disclosures of which are incorporated herein by reference in their entireties.
The related art suffers from several disadvantages. In particular, the related art techniques provide some straightforward capabilities to reduce power consumption through various optimizations; however, the power reduction achieved is limited. Further, the related art techniques monitor individual or a few basic parameters to reduce power, thereby providing a simplistic approach that may enter a power conserving state at an inopportune time and consequently adversely affect performance.
The present invention overcomes the aforementioned problems and provides several advantages. In particular, the present invention significantly reduces power consumption (effectively increasing battery life by a factor of two or more), while not appreciably affecting electronic device performance. These power consumption reductions are achieved through a combination of optimizations, aggregated together and analyzed over plural time-periods. The optimizations are based on very low-level system parameters related to the microprocessor hardware and operating system software, and high-level parameters related to the application and end-user operating environment.